The present invention relates to a system for producing circuit arrangements of highly integrated chips, particularly according to the MOS technique, for data processing instruments, such an arrangement including an arithmetic and control unit (RSE) chip and at least two memory chips as well as a collecting bus which connects the chips together.
In a circuit arrangement for microprogrammed devices, the functions of the devices, such as, for example, the basic arithmetic functions, keyboard input, printer output, tabulation, interpretation of applicator programs, etc., are controlled by a sequence of the elementary instructions of the microprogram. In the basic design of such a circuit arrangement, one arithmetic and control unit (RSE) is provided as well as one read-only memory (ROM) and one random access memory (RAM). The RSE performs the arithmetic, logic and transfer operations to link its memories and registers, and performs and controls the exchange of information within the entire circuit.
By these operations it is possible, for example, to perform any desired arithmetic operations, to transfer data and control signals to other components or peripheral units, or to receive them from such units, to make logic decisions, and to read out data to and write in data from supplemental memories.
A RAM is required in order to store data, intermediate values, etc., which are to be processed and to have them available for further processing. All arithmetic operations take place between the RAM and a calculating register of the RSE.
The ROM, finally, contains the permanent microprogram which is in constant readiness in that the ROM memory word locations are continuously cyclically addressed in sequence; i.e., the microprogram can be considered to circulate in a rest loop. The microprogram instruction words are then branched out upon the appearance of an input, for example, from the keyboard, at the selected point in the program, whereupon the input is processed according to the microprogram which now is being read out from the ROM.
Simple data processing device, such as, for example, unsophisticated table-model calculators, perform satisfactorily with one ROm for a supply of micro-instructions that can be stored at a sufficiently low fabrication cost on one chip. More sophisticated devices, however, require a larger ROM capacity so that two or more chips are required. In known circuit arrangements of this type the RSE contains an address register, which can, for example, have its content continuously increased by one binary value by counting pulses, which is able to continuously address the individual memory locations in the ROM's. If processing, for example, of an arithmetic program, is to occur, the address register is set by the RSE so that the appropriate microprogram address causes a jump to be made to the associated point in the microprogram and the individual program steps, or instructions, are read out. This includes, subsequent to the transfer address, the continuous switching, of the address register in binary value steps, transmission of each address over the collecting bus and addressing, within the chip, of the corresponding memory location in each ROM chip.
The time required for this solution is rather long, however, and this is particularly serious in MOS circuits where the signal flow is rather slow compared to circuits composed of bipolar components since the time includes, for each individual addressing of the microprogram steps, the partial times relating to the transmission of the address through the bus and addressing of the memory location within the chip.